This invention relates to digital phase locked loops for locking a reference waveform providing 0's and 1's windows into synchronism with a sequence of binary data signals encoded according to a predetermined timing interval scheme.
The purpose of a phase locked loop (PLL) is to aid in the detection of data encoded in transmitted signals. The data in the transmitted signal is encoded as high frequency changes in the "carrier" frequency. Low frequency changes are not due to "data" but to such things as oscillator drift or, as in magnetic media recording, to disk or tape speed variations.
The output of the PLL is a reference signal that is synchronized in phase and frequency with the received data signal. The synchronization bandwidth is limited so that the reference signal tracks the lower frequency changes in the data signal but not the higher frequency changes. Due to this "tracking" at lower frequencies, differences between the data signal and the reference signal are due only to the high frequency changes in the data signal. It is the differences between these two signals which results as detected data.
Simply stated a phase locked loop is a high-pass filter allowing only high frequency variations in the carrier signal to be detected as data.
Digital information is typically recorded on magnetic media such as tape in an encoding format known as modified frequency modulation ("MFM") in which the binary value of the bit is indicated by the location of the magnetic indicia along a given track. A single bit is represented by a 0 window and an adjacent (e.g., subseguent) 1 window The 0 window is sometimes referred to as the clock cell and the 1 window as the data cell. The bit is either a 0 or a 1 depending on whether a magnetic pulse is detected in one corresponding time window or the other while the tape is running at constant speed. The reference waveform produced and governed by the PLL frames the alternating 1 and 0 windows used for recovering data recorded by MFM. By design, the read data (sensed magnetic pulses) fall timewise into the middle of one window or the other depending on their binary state.
Ideally, the magnetic pulses are recorded and read cut perfectly so that they are centered exactly in the middle of the respective windows. However, there are a number of factors which degrade this precision. For example, variations in tape speed during either writing or reading or a nonuniformity in the media itself, can shift all of the subseguent data forward or backward slightly in time. This low frequency variability has to be accommodated in the reference signal or synchronization will be lost and subseguent data misread.
In an analog PLL design, a voltage controlled oscillator (VCO) is used to generate the reference signal. At any particular instance, the frequency of oscillation output by the VCO is determined by a control voltage. To change the frequency of oscillation the control voltage is changed to a higher or lower level. To change the phase of the reference signal in relation to the data signal the control voltage must be pulsed resulting in the oscillator either speeding up or slowing down (depending on the polarity of the pulse voltage) and then returning to the level at which the control voltage was before the pulse.
In the analog PLL design, detected phase errors between the reference signal and the data signal cause a current pulse to be generated by a "charge pump" with the pulse width determined by the phase time displacement between the two signals. (The magnitude of the current pulse is fixed but can be changed to change the gain of the loop.)
The current pulse passes to a resistor/capacitor circuit. The voltage across the resistor/capacitor circuit is applied to the VCO as the control voltage. The current pulse causes a voltage pulse across the resistor and a small change in the stored charge of the capacitor The voltage pulse across the resistor causes a phase change between the reference signal and the data signal and the change in the capacitor voltages adjusts the reference signal to match the frequency of the data signal.
The relationship between the charge pump current and the capacitor size determines the gain of the loop and the relationship of the resistor to the capacitor determines the step response of the loop.
With a multi track tape, each data channel requires its own PLL to synchronize a respective reference waveform. A PLL requiring analog elements is implemented in linear rather than digital integrated circuits. Given the present constraints on very large scale integrated circuits of the linear variety, multi-channel tape drives require many chips to implement high resolution PLL circuits.